1. Field of the Invention
The field of the invention is generally related to design structures, and more specifically, design structures for dynamically allocating lanes to a plurality of PCI Express connectors.
2. Description of Related Art
A PCI Express bus is an implementation of the Peripheral Components Interconnect (‘PCI’) computer bus according to the set of PCI Express specifications promulgated by the PCI Special Interest Group (‘PCI SIG’). A PCI Express bus uses existing PCI programming and software concepts, but is based on a different and much faster serial physical-layer communications protocol. The physical-layer consists not of a bus, but of a network of serial interconnections extending to each device from a switch. The switch provides point-to-point communications between devices connected to the switch. Devices and switches operating according to the PCI Express specifications are generally referred to as ‘PCI Express devices’ and ‘PCI Express switches’ respectively.
A connection between any two PCI Express devices is referred to as a ‘link.’ A link consists of a collection of one or more lanes used for data communications between devices. Each lane is a set of two unidirectional low voltage differential signaling pairs of transmission pathways such as, for example, traces along a motherboard. Because transmitting data and receiving data are implemented using separate differential pairs, each lane allows for full-duplex serial data communication of up to five gigabits of data per second.
All devices must minimally support single-lane links. PCI Express devices may optionally support wider links composed of two, four, eight, twelve, sixteen, or thirty-two lanes by providing additional pins on the hardware interface of the device that plug into a PCI Express connector. A PCI Express connector is a connector manufactured according to the PCI Express specifications and may physically support connections for one, two, four, eight, twelve, sixteen, or thirty-two lanes in a manner similar to PCI Express devices. A PCI Express device may install into any PCI Express connector that physically supports the same or a greater number of lanes as the lanes physically supported by the PCI Express device. For example, a PCI Express device physically supporting eight lanes may be installed in to a PCI Express connector physically supporting eight, twelve, sixteen, or thirty-two lanes. Such an eight lane PCI Express device, however, cannot be physically installed in a one, two, or four lane PCI Express connector.
Although a PCI Express device and the PCI Express connector into which the device is installed may physically support links with up to thirty-two lanes, a PCI Express device may utilize fewer lanes for data communication than the maximum number of lanes physically supported by the device and the connector. For example, a PCI Express device may physically support eight lanes and be installed in a PCI Express connector physically supporting sixteen lanes. The eight lane PCI Express device may, however, only utilize one, two, or four of those eight lanes it supports for data communications with other PCI Express devices. The number of lanes actually utilized for the data communications link between two devices is typically the highest number of lanes mutually supported by the devices.
The current chipsets implementing the PCI Express switch that provides the point-to-point communications between devices typically support seventeen physical lanes. On workstations, these seventeen lanes provided by the PCI Express switch are typically connected to two PCI Express connectors: a sixteen lane connector and a one lane connector. Often, a high end video graphics adapter is installed in the sixteen lane PCI Express connector and some other PCI Express device is installed in the one lane PCI Express connector. Such a configuration works well in computer systems where the performance of the video graphics adapter is most important. In other computer systems, however, other allocations of the seventeen physical lanes may be preferred. In a server system, for example, allocating the seventeen lanes to three or more PCI Express connectors may be preferred to provide the server system with one connector for installing a video adapter and two or more connectors to provide redundant network adapters or redundant storage drive adapters. That is, in the server configuration, computer architects prefer to have more PCI Express connectors connecting to the switch that provide redundancy over the workstation configuration that provides a single high-bandwidth PCI Express connector. Although the same chipset is used to implement the seventeen lane PCI Express switch in either the workstation or server configuration, the number of PCI Express connectors and the electrical connections between the connectors and the switch are different for the workstation configuration and the server configuration. Because of the contrasting requirements of these two configurations, these two configurations cannot currently coexist on the same motherboard.